; Constants
.equ	RAMTOP = 0x60
;.equ	BZZ		=3

.equ	bit0	= 0b00000001
.equ	bit1	= 0b00000010
.equ	bit2	= 0b00000100
.equ	bit3	= 0b00001000
.equ	bit4	= 0b00010000
.equ	bit5	= 0b00100000
.equ	bit6	= 0b01000000
.equ	bit7	= 0b10000000

.def	acc		=r16

; Load immediate word into the resister pair.
;	ldiw	Z,var

.macro	ldiw
	ldi		@0L,low(@1)
	ldi		@0H,high(@1)
.endm

; Load memory word into the resister pair.
;	ldsx	Z,mem

.macro	ldsx
	lds		@0L,@1
	lds		@0H,@1+1
.endm

; Store resister pair into memory
;	stsx	mem,Z

.macro	stsx
	sts		@0,@1L
	sts		@0+1,@1H
.endm

; Store immediate into the indirect memory
;	sti		Z,imm

.macro	sti
	ldi		r16,@1
	st		@0,r16
.endm

; Add immediate to register
;	addi	var,imm

.macro	addi
	subi	@0,-(@1)
.endm

.macro	adci
	sbci	@0,-(@1)
.endm

; Store immediate into the direct memory
;	stsi	var,imm

.macro	stsi
	ldi		r16,@1
	sts		@0,r16
.endm

; Output immediate
;	outi	port,var

.macro	outi
	ldi		r16,@1
	out		@0,r16
.endm

; Long branch
.macro	rjeq
	brne	PC+2
	rjmp	@0
.endm
.macro	jeq
	cp		@0,@1
	brne	PC+2
	rjmp	@2
.endm
.macro	jeqi
	cpi		@0,@1
	brne	PC+2
	rjmp	@2
.endm
.macro	beq
	cp		@0,@1
	breq	@2
.endm
.macro	beqi
	cpi		@0,@1
	breq	@2
.endm

.macro	rjne
	breq	PC+2
	rjmp	@0
.endm
.macro	jne
	cp		@0,@1
	breq	PC+2
	rjmp	@2
.endm
.macro	jnei
	cpi		@0,@1
	breq	PC+2
	rjmp	@2
.endm
.macro	bne
	cp		@0,@1
	brne	@2
.endm
.macro	bnei
	cpi		@0,@1
	brne	@2
.endm

.macro	rjcc
	brcs	PC+2
	rjmp	@0
.endm

.macro	rjcs
	brcc	PC+2
	rjmp	@0
.endm

.macro	djnz
	dec		@0
	brne	@1
.endm

.macro	jlt
	cp		@0,@1
	brcc	PC+2
	rjmp	@2
.endm
.macro	jlti
	cpi		@0,@1
	brcc	PC+2
	rjmp	@2
.endm
.macro	blt
	cp		@0,@1
	brcs	@2
.endm
.macro	blti
	cpi		@0,@1
	brcs	@2
.endm

.macro	jge
	cp		@0,@1
	brcs	PC+2
	rjmp	@2
.endm
.macro	jgei
	cpi		@0,@1
	brcs	PC+2
	rjmp	@2
.endm
.macro	bge
	cp		@0,@1
	brcc	@2
.endm
.macro	bgei
	cpi		@0,@1
	brcc	@2
.endm

.macro	jgt
	cp		@1,@0
	brcc	PC+2
	rjmp	@2
.endm
.macro	jgti
	cpi		@0,@1
	brcs	PC+3
	breq	PC+2
	rjmp	@2
.endm
.macro	bgt
	cp		@1,@0
	brcs	@2
.endm
.macro	bgti
	cpi		@0,@1
	brcs	PC+3
	breq	PC+2
	rjmp	@2
.endm

.macro	jle
	cp		@1,@0
	brcs	PC+2
	rjmp	@2
.endm
.macro	jlei
	cpi		@0,@1
	breq	PC+2
	brcc	PC+2
	rjmp	@2
.endm
.macro	ble
	cp		@1,@0
	brcc	@2
.endm
.macro	blei
	cpi		@0,@1
	brcs	@2
	breq	@2
.endm

;
;	outw	TCNT1H,r17,r16
.macro	outw
	cli
	out		@2,@0
	out		@2-1,@1
	sei
.endm

;
;	inw		r17,r16,TCNT1H
.macro	inw
	cli
	in		@2,@0-1
	in		@1,@0
	sei
.endm

.macro	goto
	rjmp	@0
.endm

.macro	lpmtab
	ldi		ZL,low(@0*2)
	ldi		ZH,high(@0*2)
	add		ZL,@1
	brcc	PC+2
	inc		ZH
	lpm
.endm

.macro	lpmr
	lpm
	mov		@0,r0
	adiw	ZL,1
.endm

;	jbic	PORTB,b,adr
.macro	jbic
	sbis	@0,@1
	rjmp	@2
.endm

;	jbis	PORTB,b,adr
.macro	jbis
	sbic	@0,@1
	rjmp	@2
.endm

;	jbrc	r1,b,adr
.macro	jbrc
	sbrs	@0,@1
	rjmp	@2
.endm

;	jbrs	PORTB,b,adr
.macro	jbrs
	sbrc	@0,@1
	rjmp	@2
.endm

;	cbic	PORTB,b,adr
.macro	cbic
	sbis	@0,@1
	rcall	@2
.endm

;	cbis	PORTB,b,adr
.macro	cbis
	sbic	@0,@1
	rcall	@2
.endm

;	cbrc	PORTB,b,adr
.macro	cbrc
	sbrs	@0,@1
	rcall	@2
.endm

;	cbrs	PORTB,b,adr
.macro	cbrs
	sbrc	@0,@1
	rcall	@2
.endm

;	wbs		PORTB,b
.macro	wbs
	sbic	@0,@1
	rjmp	PC-1
.endm

;	wbc		PORTB,b
.macro	wbc
	sbis	@0,@1
	rjmp	PC-1
.endm

;	clrio	TCNT1L
.macro	clrio
	clr		r16
	out		@0,r16
.endm

;	clriow	TCNT1
.macro	clriow
	clr		r16
	out		@0H,r16
	out		@0L,r16
.endm

;	mvi		r1,8
.macro	mvi
	ldi		r16,@1
	mov		@0,r16
.endm

.macro	mult2
	lsl		@0
.endm

.macro	mult4
	lsl		@0
	lsl		@0
.endm

.macro	mult5
	mov		r16,@0
	lsl		r16
	lsl		r16
	add		@0,r16
.endm

.macro	mult6
	mov		r16,@0
	lsl		r16
	add		@0,r16
	lsl		@0
.endm

.macro	mult8
	lsl		@0
	lsl		@0
	lsl		@0
.endm

.macro	mult9
	mov		r16,@0
	lsl		r16
	lsl		r16
	lsl		r16
	add		@0,r16
.endm

.macro	mult10
	mov		r16,@0
	lsl		r16
	lsl		r16
	add		@0,r16
	lsl		@0
.endm

.macro	cc
	brcc	PC+2
	rcall	@0
.endm

.macro	cnc
	brcs	PC+2
	rcall	@0
.endm

.macro	rc
	brcc	PC+2
	ret
.endm

.macro	rnc
	brcs	PC+2
	ret
.endm

.macro	cz
	brne	PC+2
	rcall	@0
.endm

.macro	cnz
	breq	PC+2
	rcall	@0
.endm

.macro	rz
	brne	PC+2
	ret
.endm

.macro	rnz
	breq	PC+2
	ret
.endm

.macro	jz
	brne	PC+2
	rjmp	@0
.endm

.macro	jnz
	breq	PC+2
	rjmp	@0
.endm

.macro	bnz
	brne	@0
.endm

.macro	bz
	breq	@0
.endm

.macro	jc
	brcc	PC+2
	rjmp	@0
.endm

.macro	jnc
	brcs	PC+2
	rjmp	@0
.endm

.macro	incio
	push	r16
	in		r16,@0
	inc		r16
	out		@0,r16
	pop		r16
.endm

.macro	eori
	ldi		r16,@1
	eor		@0,r16
.endm

;adds two pairs of register
;	add16	XH,XL,YH,YL
.macro	add16
	add		@1,@3				;Add low bytes
	adc		@0,@2				;Add high bytes with carry
.endm

;adds register with immediate number
;	addi16	XH,XL,n
.macro	addi16
	subi	@1, low(-@2)		;Add low byte ( x -(-y)) = x + y
	sbci	@0, high(-@2)		;Add high byte with carry
.endm

;subtracts two pairs of register
;	sub16	XH,XL,YH,YL
.macro	sub16
	sub		@1,@3				;Subtract low bytes
	sbc		@0,@2				;Add high byte with carry
.endm

;subtracts the immediate number from register
;	subi16	XH,XL,n
.macro	subi16
	subi	@1,low(@2)			;Subtract low bytes
	sbci	@0,high(@2)			;Subtract high byte with carry
.endm

;compares the register pairs
;	cp16	XH,XL,YH,YL
.macro	cp16
	cp		@1,@3				;Compare low byte
	cpc		@0,@2				;Compare high byte with carry
.endm

;compares the register pairs
;	cpi16	XH,XL,n
.macro	cpi16
	cpi		@1,low(n)			;Compare low byte
	ldi		r16,high(n)
	cpc		@0,r16				;Compare high byte
.endm

;negates the register pair
;	ng16	XH,XL
.macro	ng16
	com		@1					;Invert low byte	;Calculated by 
	com		@0					;Invert high byte	;incverting all 
	subi	@1,low(-1)			;Add 0x0001, low byte	;bits then adding
	sbci	@0,high(-1)			;Add high byte		;one (0x0001)
.endm	ng16